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Espressif Systems /ESP32-P4 /SOC_ETM /EVT_ST2

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Interpret as EVT_ST2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MCPWM0_EVT_TIMER2_TEZ_ST)MCPWM0_EVT_TIMER2_TEZ_ST 0 (MCPWM0_EVT_TIMER0_TEP_ST)MCPWM0_EVT_TIMER0_TEP_ST 0 (MCPWM0_EVT_TIMER1_TEP_ST)MCPWM0_EVT_TIMER1_TEP_ST 0 (MCPWM0_EVT_TIMER2_TEP_ST)MCPWM0_EVT_TIMER2_TEP_ST 0 (MCPWM0_EVT_OP0_TEA_ST)MCPWM0_EVT_OP0_TEA_ST 0 (MCPWM0_EVT_OP1_TEA_ST)MCPWM0_EVT_OP1_TEA_ST 0 (MCPWM0_EVT_OP2_TEA_ST)MCPWM0_EVT_OP2_TEA_ST 0 (MCPWM0_EVT_OP0_TEB_ST)MCPWM0_EVT_OP0_TEB_ST 0 (MCPWM0_EVT_OP1_TEB_ST)MCPWM0_EVT_OP1_TEB_ST 0 (MCPWM0_EVT_OP2_TEB_ST)MCPWM0_EVT_OP2_TEB_ST 0 (MCPWM0_EVT_F0_ST)MCPWM0_EVT_F0_ST 0 (MCPWM0_EVT_F1_ST)MCPWM0_EVT_F1_ST 0 (MCPWM0_EVT_F2_ST)MCPWM0_EVT_F2_ST 0 (MCPWM0_EVT_F0_CLR_ST)MCPWM0_EVT_F0_CLR_ST 0 (MCPWM0_EVT_F1_CLR_ST)MCPWM0_EVT_F1_CLR_ST 0 (MCPWM0_EVT_F2_CLR_ST)MCPWM0_EVT_F2_CLR_ST 0 (MCPWM0_EVT_TZ0_CBC_ST)MCPWM0_EVT_TZ0_CBC_ST 0 (MCPWM0_EVT_TZ1_CBC_ST)MCPWM0_EVT_TZ1_CBC_ST 0 (MCPWM0_EVT_TZ2_CBC_ST)MCPWM0_EVT_TZ2_CBC_ST 0 (MCPWM0_EVT_TZ0_OST_ST)MCPWM0_EVT_TZ0_OST_ST 0 (MCPWM0_EVT_TZ1_OST_ST)MCPWM0_EVT_TZ1_OST_ST 0 (MCPWM0_EVT_TZ2_OST_ST)MCPWM0_EVT_TZ2_OST_ST 0 (MCPWM0_EVT_CAP0_ST)MCPWM0_EVT_CAP0_ST 0 (MCPWM0_EVT_CAP1_ST)MCPWM0_EVT_CAP1_ST 0 (MCPWM0_EVT_CAP2_ST)MCPWM0_EVT_CAP2_ST 0 (MCPWM0_EVT_OP0_TEE1_ST)MCPWM0_EVT_OP0_TEE1_ST 0 (MCPWM0_EVT_OP1_TEE1_ST)MCPWM0_EVT_OP1_TEE1_ST 0 (MCPWM0_EVT_OP2_TEE1_ST)MCPWM0_EVT_OP2_TEE1_ST 0 (MCPWM0_EVT_OP0_TEE2_ST)MCPWM0_EVT_OP0_TEE2_ST 0 (MCPWM0_EVT_OP1_TEE2_ST)MCPWM0_EVT_OP1_TEE2_ST 0 (MCPWM0_EVT_OP2_TEE2_ST)MCPWM0_EVT_OP2_TEE2_ST 0 (MCPWM1_EVT_TIMER0_STOP_ST)MCPWM1_EVT_TIMER0_STOP_ST

Description

Events trigger status register

Fields

MCPWM0_EVT_TIMER2_TEZ_ST

Represents MCPWM0_evt_timer2_tez trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TIMER0_TEP_ST

Represents MCPWM0_evt_timer0_tep trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TIMER1_TEP_ST

Represents MCPWM0_evt_timer1_tep trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TIMER2_TEP_ST

Represents MCPWM0_evt_timer2_tep trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP0_TEA_ST

Represents MCPWM0_evt_op0_tea trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP1_TEA_ST

Represents MCPWM0_evt_op1_tea trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP2_TEA_ST

Represents MCPWM0_evt_op2_tea trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP0_TEB_ST

Represents MCPWM0_evt_op0_teb trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP1_TEB_ST

Represents MCPWM0_evt_op1_teb trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP2_TEB_ST

Represents MCPWM0_evt_op2_teb trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_F0_ST

Represents MCPWM0_evt_f0 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_F1_ST

Represents MCPWM0_evt_f1 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_F2_ST

Represents MCPWM0_evt_f2 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_F0_CLR_ST

Represents MCPWM0_evt_f0_clr trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_F1_CLR_ST

Represents MCPWM0_evt_f1_clr trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_F2_CLR_ST

Represents MCPWM0_evt_f2_clr trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TZ0_CBC_ST

Represents MCPWM0_evt_tz0_cbc trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TZ1_CBC_ST

Represents MCPWM0_evt_tz1_cbc trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TZ2_CBC_ST

Represents MCPWM0_evt_tz2_cbc trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TZ0_OST_ST

Represents MCPWM0_evt_tz0_ost trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TZ1_OST_ST

Represents MCPWM0_evt_tz1_ost trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_TZ2_OST_ST

Represents MCPWM0_evt_tz2_ost trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_CAP0_ST

Represents MCPWM0_evt_cap0 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_CAP1_ST

Represents MCPWM0_evt_cap1 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_CAP2_ST

Represents MCPWM0_evt_cap2 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP0_TEE1_ST

Represents MCPWM0_evt_op0_tee1 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP1_TEE1_ST

Represents MCPWM0_evt_op1_tee1 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP2_TEE1_ST

Represents MCPWM0_evt_op2_tee1 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP0_TEE2_ST

Represents MCPWM0_evt_op0_tee2 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP1_TEE2_ST

Represents MCPWM0_evt_op1_tee2 trigger status.\0: Not triggered\1: Triggered
MCPWM0_EVT_OP2_TEE2_ST

Represents MCPWM0_evt_op2_tee2 trigger status.\0: Not triggered\1: Triggered
MCPWM1_EVT_TIMER0_STOP_ST

Represents MCPWM1_evt_timer0_stop trigger status.\0: Not triggered\1: Triggered

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data